A new version of ssdtPRGen (v13.9) is now available from my Github repository. This update includes the data for the new Intel® Xeon® E5-1600 and X5-2600 Processor Series aka Haswell EP with up to 18 cores and 36 threads and cool new features like:
Per Core P-States
Good news. Intel introduced a new Per Core P-States (PCPS) feature. Something I personally have been waiting for, for several years already. Note though that new power management features are not always a blessing, because they tend to add a new layer of complexity. And PCPS certainly does.
AVX2 Turbo Frequencies
The new Haswell EP processors also come with an new extended instruction set, including AVX2, and ditto maximum Turbo Frequency. This because AVX2 instructions require more power, and thus the processor will run hotter, so Intel decided to throttle it down a little more than the usual turbo frequency.
Integrated Memory Controller
There are SKUs with one and two Integrated Memory Controllers (IMC) and SKUs with a single IMC supports four DDR3 or DDR4 channels – configurable via registers – and SKUs with two IMC’s support two channels each. The first memory controller (IMC 0) is accessible via registers on Device 19-21 and the second memory controller (IMC 1) via registers on Device 22-23 – though for SKUs with one memory controller, Device 22-23 (IMC 1) is not used and should be ignored.
You can get this update by running the following terminal command:
curl -o ~/ssdtPRGen.sh https://raw.githubusercontent.com/Piker-Alpha/ssdtPRGen.sh/master/ssdtPRGen.sh
Questions and bug reports (so called ‘issues’) should be filed at:
Please do not use my blog for this.