AppleIntelInfo.kext

I want to rename AppleIntelCPUPowerManagementInfo.kext to AppleIntelinfo.kext and give it its own Github repository. That way I can update the source code more easily and add the new Intel Register Dumper tool code. A must have for IGPU only users. The problem is that I do not have the time for it… so is anyone reading this willing to do this for me? Don’t bother. Already done!

You can find the latest public source code in my github repository. Extra bonus points for adding a logfile to stop us from polluting the system.log

Please note that the new kext must run on a Yosemite system so you need the Xcode Beta!

Note: The new Intel Register Dumper for OS X enables you to dump the Intel IGPU registers to /var/log/system.log without having to use Linux! The output may come in handy if you are experiencing a black screen, reboots and other graphics issues with Yosemite. Take a look at my Haswell example below:

CPU_VGACNTRL : 0x8000298E
HSW_PWR_WELL_CTL1 : 0xc0000000
HSW_PWR_WELL_CTL2 : 0x40000000
HSW_PWR_WELL_CTL3 : 0x40000000
HSW_PWR_WELL_CTL4 : 0x40000000
HSW_PWR_WELL_CTL5 : 0x0004050f
HSW_PWR_WELL_CTL6 : 0x00000000
PIPE_DDI_FUNC_CTL_A : 0xb2030006 (enabled, DDID, DP SST, 8 bpc, +VSync, +HSync, EDP A ON, x4)
PIPE_DDI_FUNC_CTL_B : 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
PIPE_DDI_FUNC_CTL_C : 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
PIPE_DDI_FUNC_CTL_EDP: 0x00030000 (disabled, no port, HDMI, 8 bpc, +VSync, +HSync, EDP A ON, x1)
DP_TP_CTL_A : 0x00000000
DP_TP_CTL_B : 0x00000000
DP_TP_CTL_C : 0x00000000
DP_TP_CTL_D : 0x80040300
DP_TP_CTL_E : 0x00000000
DP_TP_STATUS_A : 0x00000000
DP_TP_STATUS_B : 0x00000000
DP_TP_STATUS_C : 0x00000000
DP_TP_STATUS_D : 0x00000000
DP_TP_STATUS_E : 0x00000000
DDI_BUF_CTL_A : 0x00000080 (disabled not reversed x1 not detected)
DDI_BUF_CTL_B : 0x00000000 (disabled not reversed x1 not detected)
DDI_BUF_CTL_C : 0x00000000 (disabled not reversed x1 not detected)
DDI_BUF_CTL_D : 0x86000006 (enabled not reversed x4 not detected)
DDI_BUF_CTL_E : 0x00000000 (disabled not reversed x1 not detected)
SPLL_CTL : 0x00000000
LCPLL_CTL : 0x44000037
WRPLL_CTL1 : 0x00202418
WRPLL_CTL2 : 0x00202418
PORT_CLK_SEL_A : 0xe0000000 (None)
PORT_CLK_SEL_B : 0xe0000000 (None)
PORT_CLK_SEL_C : 0xe0000000 (None)
PORT_CLK_SEL_D : 0x20000000 (LCPLL 1350)
PORT_CLK_SEL_E : 0xe0000000 (None)
PIPE_CLK_SEL_A : 0x80000000 (DDID)
PIPE_CLK_SEL_B : 0x00000000 (None)
PIPE_CLK_SEL_C : 0x00000000 (None)
SFUSE_STRAP : 0x00000007 (display enabled, crt no, lane reversal no, port b yes, port c yes, port d yes)
PIPEASRC : 0x077f04af (1920, 1200)
DSPACNTR : 0x98000000 (enabled)
DSPASTRIDE : 0x00001e00 (120)
DSPASURF : 0x00000000
DSPATILEOFF : 0x00000000 (0, 0)
PIPEBSRC : 0x00000000 (1, 1)
DSPBCNTR : 0x00000000 (disabled)
DSPBSTRIDE : 0x00000000 (0)
DSPBSURF : 0x00000000
DSPBTILEOFF : 0x00000000 (0, 0)
PIPECSRC : 0x00000000 (1, 1)
DSPCCNTR : 0x00000000 (disabled)
DSPCSTRIDE : 0x00000000 (0)
DSPCSURF : 0x00000000
DSPCTILEOFF : 0x00000000 (0, 0)
PIPEACONF : 0xc0000010 (enabled, active, pf-pd, rotate 0, 8bpc)
HTOTAL_A : 0x081f077f (1920 active, 2080 total)
HBLANK_A : 0x081f077f (1920 start, 2080 end)
HSYNC_A : 0x07cf07af (1968 start, 2000 end)
VTOTAL_A : 0x04d204af (1200 active, 1235 total)
VBLANK_A : 0x04d204af (1200 start, 1235 end)
VSYNC_A : 0x04b804b2 (1203 start, 1209 end)
VSYNCSHIFT_A : 0x00000000
PIPEA_DATA_M1 : 0x7e36c16c (TU 64, val 0x36c16c 3588460)
PIPEA_DATA_N1 : 0x00800000 (val 0x800000 8388608)
PIPEA_LINK_M1 : 0x0004901e (val 0x4901e 299038)
PIPEA_LINK_N1 : 0x00080000 (val 0x80000 524288)
PIPEBCONF : 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
HTOTAL_B : 0x00000000 (1 active, 1 total)
HBLANK_B : 0x00000000 (1 start, 1 end)
HSYNC_B : 0x00000000 (1 start, 1 end)
VTOTAL_B : 0x00000000 (1 active, 1 total)
VBLANK_B : 0x00000000 (1 start, 1 end)
VSYNC_B : 0x00000000 (1 start, 1 end)
VSYNCSHIFT_B : 0x00000000
PIPEB_DATA_M1 : 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N1 : 0x00000000 (val 0x0 0)
PIPEB_LINK_M1 : 0x00000000 (val 0x0 0)
PIPEB_LINK_N1 : 0x00000000 (val 0x0 0)
PIPECCONF : 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
HTOTAL_C : 0x00000000 (1 active, 1 total)
HBLANK_C : 0x00000000 (1 start, 1 end)
HSYNC_C : 0x00000000 (1 start, 1 end)
VTOTAL_C : 0x00000000 (1 active, 1 total)
VBLANK_C : 0x00000000 (1 start, 1 end)
VSYNC_C : 0x00000000 (1 start, 1 end)
VSYNCSHIFT_C : 0x00000000
PIPEC_DATA_M1 : 0x00000000 (TU 1, val 0x0 0)
PIPEC_DATA_N1 : 0x00000000 (val 0x0 0)
PIPEC_LINK_M1 : 0x00000000 (val 0x0 0)
PIPEC_LINK_N1 : 0x00000000 (val 0x0 0)
PIPEEDPCONF : 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
HTOTAL_EDP : 0x00000000 (1 active, 1 total)
HBLANK_EDP : 0x00000000 (1 start, 1 end)
HSYNC_EDP : 0x00000000 (1 start, 1 end)
VTOTAL_EDP : 0x00000000 (1 active, 1 total)
VBLANK_EDP : 0x00000000 (1 start, 1 end)
VSYNC_EDP : 0x00000000 (1 start, 1 end)
VSYNCSHIFT_EDP : 0x00000000
PIPEEDP_DATA_M1 : 0x00000000 (TU 1, val 0x0 0)
PIPEEDP_DATA_N1 : 0x00000000 (val 0x0 0)
PIPEEDP_LINK_M1 : 0x00000000 (val 0x0 0)
PIPEEDP_LINK_N1 : 0x00000000 (val 0x0 0)
PFA_CTL_1 : 0x80800000 (enable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel hardcoded,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_WIN_POS : 0x00000000 (0, 0)
PFA_WIN_SIZE : 0x078004b0 (1920, 1200)
PFB_CTL_1 : 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFB_WIN_POS : 0x00000000 (0, 0)
PFB_WIN_SIZE : 0x00000000 (0, 0)
PFC_CTL_1 : 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFC_WIN_POS : 0x00000000 (0, 0)
PFC_WIN_SIZE : 0x00000000 (0, 0)
TRANS_HTOTAL_A : 0x00000000 (1 active, 1 total)
TRANS_HBLANK_A : 0x00000000 (1 start, 1 end)
TRANS_HSYNC_A : 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_A : 0x00000000 (1 active, 1 total)
TRANS_VBLANK_A : 0x00000000 (1 start, 1 end)
TRANS_VSYNC_A : 0x00000000 (1 start, 1 end)
TRANS_VSYNCSHIFT_A : 0x00000000
TRANSACONF : 0x00000000 (disable, inactive, progressive)
FDI_RXA_MISC : 0x0a200090 (FDI Delay 144)
FDI_RXA_TUSIZE1 : 0x7e000000
FDI_RXA_IIR : 0x00000000
FDI_RXA_IMR : 0x00000fff
BLC_PWM_CPU_CTL2 : 0x60000000 (enable 0, pipe EDP, blinking 0, granularity 128)
BLC_PWM_CPU_CTL : 0x00000000 (cycle 0, freq 0)
BLC_PWM2_CPU_CTL2 : 0x60000000 (enable 0, pipe EDP, blinking 0, granularity 128)
BLC_PWM2_CPU_CTL : 0x00000000 (cycle 0, freq 0)
BLC_MISC_CTL : 0x00000000 (PWM1-PCH PWM2-CPU)
BLC_PWM_PCH_CTL1 : 0x00000000 (enable 0, override 0, inverted polarity 0)
BLC_PWM_PCH_CTL2 : 0x00000000 (freq 0, cycle 0)
UTIL_PIN_CTL : 0x00000000 (enable 0, transcoder A, mode data, data 0 inverted polarity 0)
PCH_PP_STATUS : 0x00000000 (off, not ready, sequencing idle)
PCH_PP_CONTROL : 0x00000000 (blacklight disabled, do not power down on reset, panel off)
PCH_PP_ON_DELAYS : 0x00000000
PCH_PP_OFF_DELAYS : 0x00000000
PCH_PP_DIVISOR : 0x00186906
PIXCLK_GATE : 0x00000000
SDEISR : 0x00800000 (port d:1, port c:0, port b:0, crt:0)
RC6_RESIDENCY_TIME : 0x70b38d42
Advertisements

10 thoughts on “AppleIntelInfo.kext

  1. Oh boy, this could be the answer to my hd4000 mystery where the output pipes were reversed (remember that?) Assuming the register dumper would work on 10.8 and hd4000? I could try yosemite but it’s still a mess to get running on my rig right now.

    • Yes. I do remember that. I had the similar problem with my i5-4670K where (UEFI) BIOS quirks forced Port-A (FDI) to the enable state, but this is no longer a problem. I believe that Apple fixed this issue in DP6 for the Mac mini (late 2014). Otherwise they would have had the same problem 😉

      • Okay, I guess that means I’ll be trying dp6 then. I didn’t realise until after I posted that you hadn’t released the mac register dumper. I’m assuming it dumps hardware values not running values? Otherwise I guess running it in Linux isn’t going to yield useful info.

      • I will do my utmost best to release the new update today, in a new Github repository, and it dumps the values after AppleIntelFramebufferAzul.kext has started.

      • No idea. Haven’t checked it myself, but I did add the missing code (a few hundred lines) for Ivy Bridge processors to AppleIntelInfo.kext It was a lot of work, which is also why I haven’t committed my work, but that should be done later today.

      • No rush dude, I really appreciate what you are doing! As reference for anyone following, 10.9.5 13f18 still does it. I haven’t yet got 10.10 to boot up on it.

      • It builds but it doesn’t work – running: sudo kextlibs -undef-symbols AppleIntelInfo.kext
        errors out with mp_rendezvous_no_intrs and cpu_number being undefined. Won’t have time today anymore. Hopefully tomorrow.

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s